The CHERI Alliance is an industry-led body driving adoption of CHERI (Capability Hardware Enhanced RISC Instructions) — hardware technology that tackles memory-safety vulnerabilities, the root cause of a large share of cyber attacks, at the hardware level. Members include Google, NCSC, Dstl, the University of Cambridge, SRI International, SCI Semiconductor, lowRISC and TechWorks; the Alliance organises working groups for standardisation, engineering, and ecosystem adoption.
Contracts Secured
None recorded — the Alliance is a membership body; NQM’s CHERI-related delivery comes through DSbD-programme projects.